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  ? semiconductor components industries, llc, 2017 february, 2017 ? rev. 3 1 publication order number: NUP8011MU/d NUP8011MU transient voltage suppressors esd protection diodes with low clamping voltage array this integrated transient voltage suppressor device (tvs) is designed for applications requiring transient overvoltage protection. it is intended for use in sensitive equipment such as computers, printers, business machines, communication systems, and other applications. its integrated design provides very effective and reliable protection for eight separate lines using only one package. these devices are ideal for situations where board space is at a premium. features ? low clamping voltage ? udfn package, 1.2 x 1.8 mm ? standoff voltage: 4.3 v ? low leakage current ? iec61000?4?2, level 4 esd protection ? moisture sensitivity level 1 ? these devices are pb?free, halogen free/bfr free and are rohs compliant benefits ? provides protection for esd industry standards: iec 61000, hbm ? protects the line against transient voltage conditions ? minimize power consumption of the system ? minimize pcb board space applications ? esd protection for data lines ? wireless phones ? handheld products ? notebook computers ? lcd displays maximum ratings (t a = 25 c unless otherwise noted) characteristic symbol value unit steady state power ? 1 diode (note 1) p d 380 mw thermal resistance, junction?to?ambient above 25 c, derate r  ja 327 3.05 c/w mw/ c maximum junction temperature t jmax 150 c operating temperature range t op ?40 to +85 c storage temperature range t stg ?55 to +150 c lead solder temperature (10 seconds duration) t l 260 c iec 61000?4?2 (esd)contact  8.0 kv machine model ? class c mm 400 v human body model ? class 3b hbm 8.0 kv stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. only 1 diode under power. for all 4 diodes under power, p d will be 25%. mounted on fr?4 board with min pad. see application note and8308/d for further description of survivability specs. device package shipping ordering information NUP8011MUtag udfn8 (pb?free) 3000 / tape & ree l marking diagram www. onsemi.com ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. 1 (top view) 8 2 7 3 6 4 5 udfn8 case 517ad p3 = specific device code m = month code  = pb?free package pin connections 14 5 8 1 8 p3 m  1
NUP8011MU www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current i f forward current v f forward voltage @ i f p pk peak power dissipation c capacitance @ v r = 0 and f = 1.0 mhz *see application note and8308/d for detailed explanations of datasheet parameters. uni?directional i pp i f v i i r i t v rwm v c v br v f electrical characteristics (t a = 25 c) device device marking breakdown voltage v br @ 1 ma (v) leakage current i rm @ v rm typ capacitance @ 0 v bias (pf) (note 2) typ capacitance @ 3 v bias (pf) (note 2) v c min nom max v rwm i rwm (  a) typ max typ max per iec61000?4?2 (note 3) NUP8011MUtag p3 6.47 6.8 7.14 4.3 1.0 12 14 6.7 9.5 figures 1 and 2 (see below) product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. capacitance of one diode at f = 1 mhz, v r = 0 v, t a = 25 c 3. for test procedure see figures 3 and 4 and application note and8307/d. figure 1. esd clamping voltage screenshot positive 8 kv contact per iec61000?4?2 figure 2. esd clamping voltage screenshot negative 8 kv contact per iec61000?4?2
NUP8011MU www. onsemi.com 3 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 3. iec61000?4?2 spec figure 4. diagram of esd test setup 50  50  cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000?4?2 waveform. since the iec61000?4?2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d.
NUP8011MU www. onsemi.com 4 typical electrical characteristics figure 5. reverse leakage versus temperature 5.0 1.0 0 ?100 0 100 150 t, temperature ( c) i r , reverse leakage (na) ?50 50 2.0 3.0 4.0 figure 6. capacitance 14 12 10 8 6 4 2 0 01 2 3 6 bias voltage (v) t a = 25 c typical capacitance (pf) 1 mhz frequency 45 v f , forward voltage (v) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.1 0.01 0.001 1 i f , forward current (a) t a = 25 c figure 7. forward voltage
NUP8011MU www. onsemi.com 5 package dimensions udfn8, 1.8x1.2, 0.4p case 517ad issue d notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 e2 bottom view b e 8x 0.10 b 0.05 a c c k 8x note 3 2x 0.10 c pin one reference top view 2x 0.10 c 8x a a1 (a3) 0.05 c 0.05 c c seating plane side view l 8x 1 8 dim min max millimeters a 0.45 0.55 a1 0.00 0.05 a3 0.13 ref b 0.15 0.25 d 1.80 bsc d2 0.90 1.10 e 1.20 bsc e2 0.20 0.30 e 0.40 bsc l 0.20 0.30 detail b 1.10 0.25 0.35 7x 0.35 1.50 0.40 pitch dimensions: millimeters 0.45 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1 package outline j 0.19 ref l1 ??? 0.10 8x a1 a3 ?? 0.20 typ on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NUP8011MU/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?


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